中文信息-欧洲杯投注官网

2012.09-2016.07 电子科技大学集成电路设计与集成系统专业本科；

2016.09-2017.06 电子科技大学微电子学与固体电子学专业硕士研究生；

2017.09-2020.12 电子科技大学微电子学与固体电子学专业博士研究生；

2017.08-2019.09 台湾清华大学电机工程学系联合培养博士研究生。

本科生课程：《高能效集成电路设计》（研讨）

研究生课程:《专用集成电路设计》

journals (部分代表期刊论文):

[1] xin si, et.al., a local computing cell and 6t sram-based computing-in-memory macro with 8-b mac operation for edge ai chips, ieee journal of solid-state circuits (jssc), sep. 2021;

[2] jian-wei su, xin si, et. al., two-way transpose multibit 6t sram computing-in-memory macro for inference-training ai eged chips, ieee journal of solid-state circuits (jssc), 2021;

[3] xin si, et.al.,a twin-8t sram computation-in-memory unit-macro for multibit cnn-based ai edge processors , ieee journal of solid-state circuits (jssc),jan., 2020;

[4] xin si, et.al.,a dual-split 6t sram-based computing-in-memory unit-macro with fully parallel product-sum operation for binarized dnn edge processors, ieee transactions on circuits and systems i: regular papers,(tcas-i), nov. 2019;

conferences （部分代表会议论文）:

[1] xin si,yung-ning tu, wei-hsing huang, jian-wei su, pei-jung lu, jing-hong wang, ta-wei liu, ssu-yen wu, ruhui liu, yen-chi chou,qiang li, meng-fan chang, a 28nm 64kb 6t sram computing-in-memory macro with 9-bit mac operation for ai edge chips, international solid-state circuits conference (isscc), 2020;

[2] xin si, jia-jing chen, yung-ning tu, wei-hsing huang, jing-hong wang, yen-cheng chiu, wei-chen wei, ssu-yen wu, xiaoyu sun, rui liiu, shimeng yu, ren-shuo liu, chih-cheng hsieh, kea-tiong tang,qiang, li, meng-fan chang,a twin-8t sram computation-in-memory macro for multiple-bits cnn-based machine learning, international solid-state circuits conference (isscc), 2019;

[3] yuxin zhang, sitao zeng, zhiguo zhu, zhaolong qin, chen wang, jingjing li, sanfeng zhang, yajuan he, chunmeng dou, xin si*, meng-fan chang, qiang li, a 40nm 1mb 35.6 tops/w mlc nor-flash based computation-in-memory structure for machine learning, 2021 ieee international symposium on circuits and systems (iscas)(* corresponding author);

[4] sitao zeng, yuxin zhang,zhiguo zhu, zhaolong qin, chunmeng dou, xin si*, qiang li,mlflash-cim: embedded multi-level nor-flash cell based computing in memory architecture for edge ai devices, 2021 ieee 3rd international conference on artificial intelligence circuits and systems (aicas)(* corresponding author);

details please refer to: 

存内计算，存储器，混合信号，人工智能ai芯片设计

目前担任ieee vlsi-tsa和 mcsoc等会议tpc，担任ieee jssc, tcas-i, tcas-ii, tvlsi, iscas, ted, apccas, 半导体学报和中国科学的分会主席或审稿人。